The Silicon Photonics Process Engineer Who Puts Light on the Wafer

The seat that opened when light moved onto the wafer

At the international forum SEMI and the Silicon Photonics Alliance ran together at SEMICON Taiwan on 31 August 2026, the forum chair, a TSMC executive from advanced packaging technology, said the underlying architecture of the optical transceiver has shifted and that silicon photonics is now the mainstream form. He put its share above 50 percent in 2027 and named co-packaged optics as the shape silicon photonics ultimately takes. Figures presented at the same session had optical transceiver revenue up 25 percent in 2025 over the prior year and a further 50 percent expected in 2026. The high-speed tier above 100G doubled in 2024 and grew another 60 percent in 2025 (Commercial Times).

Inside the fab the change is easy to see. Until now what went onto the wafer were devices that move electrons. The same wafer now also carries waveguides, modulators and grating couplers. The silicon photonics process engineer owns the unit process steps that build those optical devices.

Four foundries lined up in the same year

TSMC has moved its silicon photonics integration platform, called COUPE, into production, stacking the electronic and photonic dies in three dimensions with SoIC and tying that into CoWoS packaging. UMC shipped its first batch of mass-produced silicon photonics wafers from its 12-inch fab in Singapore and is targeting 2027 for its own 12-inch platform, while developing a 400G-per-channel pure silicon photonics solution with SILITH Technology. GlobalFoundries bought Singapore-based Advanced Micro Foundry in 2025 and folded it into the Fotonix platform for co-packaged optics work. Tower Semiconductor is converting its Arai plant in Niigata into a 12-inch silicon photonics and advanced packaging line and expanding Uozu Fab 7 in Toyama, with mass production targeted for the fourth quarter of 2027 (TrendForce).

Memory makers are entering from the other side. Samsung opened a silicon photonics foundry platform on a 300mm process, starting with photonic integrated circuits, with a modulator running 224 Gbps per lane, which is 800 Gbps across four lanes and 1.6 Tbps across eight. Its published roadmap runs optical engines in 2027, hybrid copper bonding in 2028 and turnkey co-packaged optics services in 2029, and the company points to holding HBM, foundry, packaging and silicon photonics under one roof. Intel and STMicroelectronics have been making photonic integrated circuits for longer, so how far the early customer list extends is still open (TheElec).

One more row on the control chart

The values a process engineer used to watch were thickness, linewidth and defect count. Optical values now sit beside them.

• Waveguide loss: roughness on the etched sidewall turns directly into signal attenuation. Line edge roughness shows up as light intensity rather than as yield.
• Coupling efficiency: the alignment window on a grating or edge coupler is very narrow, and litho overlay error becomes coupling loss.
• Modulator characteristics: extinction ratio, insertion loss and bandwidth, all driven by the doping profile and the electrode geometry.
• Thermal stability: the refractive index of silicon moves with temperature, so a ring resonator design drifts in operating wavelength as the die heats.
• Bonding precision: the alignment when the electronic and photonic dies are stacked. The weight on this line grows as designs move toward co-packaged optics.

Metrology changes too. An optical prober sweeps wavelength across the wafer and the resulting spectrum goes onto the control chart. Reading a within-wafer map of wavelength drift and tracing it back to the step whose thickness went off is the everyday work of this seat.

The crossing from electronic to optical process work

Three routes lead in. Process engineers already running an etch or deposition module in a fab, graduates in optics or optoelectronics, and people who have done assembly and test on optical communication modules. The first route is the most common. The unit process instincts carry over intact and only the optical vocabulary is new.

What has to be learned is waveguide theory, coupled mode theory and the physics of semiconductor optical modulation. One semester of a senior undergraduate or graduate optoelectronics course is enough to hold a conversation on the floor. The tool set is an optical simulator and a photonic layout environment, and in production wafer-level optical metrology equipment sits on top of that.

Several things are still unsettled. How fast co-packaged optics displaces pluggable modules, which package format becomes the standard, and whether the fab or the packaging house owns optical alignment all differ from company to company.

A student can start today by drawing a single waveguide in an open source photonics design toolkit and pushing it through a simulator. How loss accumulates with length, and where the light leaks once the bend radius tightens, both show up in that one run.